RELOCATION ASSISTANCE: No relocation assistance availableCLEARANCE TYPE: Secret
TRAVEL: Yes, 10 of the Time
Description
At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact peoples lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nations history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work — and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, theyre making history.
We are seeking a subject matter expert (SME) in FPGA firmware to own the end to end firmware strategy for multiple defense programs within our Fuze and Warhead Operating Unit. This Senior Principal Engineer will serve as the IPT Lead for Firmware Design, driving architecture, development, verification, and integration while mentoring a cross functional team of hardware, software, and systems engineers. Candidates must possess deep expertise in VHDL/Verilog and have a proven track record of program leadership in a DoD environment. Support the Common Munitions BIT/Reprogramming Equipment (CMBRE) Program
Key Responsibilities:
• Define and maintain the FPGA firmware architecture for assigned programs, ensuring scalability, reliability, and compliance with system level requirements.
• Lead the Firmware IPT, coordinating with hardware, software, systems, test, and program management to deliver projects on schedule and within budget.
• Develop complex firmware blocks in VHDL (preferred) or Verilog targeting various FPGA families such as Intel Agilex, Arria 10, Max 10, and Xilinx.
• Create and execute verification plans using simulation, hardware in the loop, and on board debugging tools (e.g., ModelSim, Vivado, Quartus).
• Manage design constraints (timing, power, I/O) and perform static timing analysis to meet critical performance targets.
• Integrate firmware with hardware/software, including bus protocols (I²C, SPI, UART, RS 232/422/485, JESD204B, CSI/MIPI, Ethernet) and custom IP blocks.
• Lead technical documentation efforts (architecture documents, interface control documents, test plans, release notes) and ensure configuration management compliance.
• Mentor junior engineers, conduct design reviews, and drive continuous improvement initiatives (Six Sigma, DFA/DFM).
• Provide risk management and mitigation strategies for firmware related technical risks.
• Interface with customers and senior leadership to translate stakeholder requirements into effective firmware solutions.
Basic (Required) Qualifications:
• Education: B.S. in Electrical or Computer Engineering with 8+ years relevant experience OR M.S. with 6+ years.
• FPGA Design: Proven experience in designing complex FPGA firmware using VHDL or Verilog.
• Verification: Proficiency with simulation tools (ModelSim, Vivado, Quartus) and hardware debugging tools (logic analyzers, oscilloscopes).
• Timing Closure: Expertise in managing design constraints to meet stringent timing and performance targets.
• Integration: Experience with hardware/software integration for embedded systems and soft processor interfacing.
• Documentation: Demonstrated ability to produce comprehensive technical documentation.
• Team Collaboration: Excellent interpersonal skills for effective cross functional teamwork.
• Security Clearance: U.S. citizenship; ability to obtain and maintain a DoD Secret clearance (active preferred).
Preferred Qualifications:
• Bus Protocol Expertise: Experience with protocols such as I²C, SPI, RS232, JESD204B, and CSI/MIPI.
• Preferred HDL: Strong preference for VHDL, with Verilog experience considered beneficial.
• DSP Firmware: Demonstrated experience with digital signal processing functions (lowpass, bandpass, highpass filters, comb filters, Hilbert transforms, PLLs, etc.).
• Device Families: Familiarity with Intel Agilex, Arria 10, Max 10, as well as Xilinx UltraScale+ devices.
• Toolset Proficiency: Experience with tools such as Vivado, Model Composer, Synplicity, MATLAB/Simulink, Altera DSP Builder, and HDL Code generators.
• IP Creation & Integration: Proven ability to develop reusable IP blocks and integrate thirdparty IP.
• Full Product Lifecycle: Involvement from concept through production test and field support.
• Military Test Experience: Knowledge of testing requirements specific to military electronics (extreme temperature, vibration, EMC).
• Process Improvement: Familiarity with SixSigma methodologies and design for assembly/manufacturability (DFA/DFM) principles.
• Leadership Experience: Prior success leading an IPT or firmware development team in a highstakes defense environment.
• Active DoD Clearance: An active DoD Secret clearance is a plus.
Physical & Travel Requirements:
• Ability to work occasional overtime during critical project milestones.
• Travel up to 10 of the time for customer visits, production support, and testing events (including secure facilites).
Primary Level Salary Range: $149,300.00 - $223,900.00
The above salary range represents a general guideline; however, Northrop Grumman considers a number of factors when determining base salary offers such as the scope and responsibilities of the position and the candidates experience, education, skills and current spanet conditions.
Depending on the position, employees may be eligible for overtime, shift differential, and a discretionary bonus in addition to base pay. Annual bonuses are designed to reward individual contributions as well as allow employees to share in company results. Employees in Vice President or Director positions may be eligible for Long Term Incentives. In addition, Northrop Grumman provides a variety of benefits including health insurance coverage, life and disability insurance, savings plan, Company paid holidays and paid time off (PTO) for vacation and/or personal business.
The application period for the job is estimated to be 20 days from the job posting date. However, this timeline may be shortened or extended depending on business needs and the availability of qualified candidates.
Northrop Grumman is an Equal Opportunity Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. For our complete EEO and pay transparency statement, please visit http://www.northropgrumman.com/EEO. U.S. Citizenship is required for all positions with a government clearance and certain other restricted positions.